The high density 3D stacked test chip suitable for high performance computing is jointly launched by grid and armor

Arm's interconnection technology, combined with grid's 12LP process, brings high performance and low latency performance, and broadenes the high core design bandwidth of artificial intelligence (AI), cloud computing and mobile SoC.

As an advanced professional OEM, grid core today announced that it has produced 3D high-density test chips based on Arm®, which can improve the system performance and energy efficiency of computing applications such as artificial intelligence/machine learning (AI/ML) and high-end consumer electronics mobile and wireless solutions.The new chip is manufactured by grid cell 12nm leader-performance (12LP) FinFET process, and Arm 3D mesh interconnection technology is used to make the data path between cores more direct, which can reduce the delay, improve the data transmission rate, and meet the needs of data center, edge computing and high-end consumer electronics applications.

The delivery of the chip is testament to the rapid progress Arm and grid have made in researching and developing differentiated solutions that improve device density and performance for scalable high-performance computing.In addition, the two companies have demonstrated a 3D testable design (DFT) approach that USES hybrid bonding between wafers and cells to connect up to 1 million 3D connections per square millimeter, extending the use of the 12nm design for future applications.

Eric Hennenhoefer, vice President of Arm Research, said: "Arm's 3D interconnection enables the semiconductor industry to strengthen Moore's law for a more diverse range of computing applications.Grid core's expertise in manufacturing and advanced packaging capabilities, combined with Arm technology, gives our common partners more differentiated capabilities and drives the next generation of HPC models."

"In the age of big data and cognitive computing, advanced packaging is far more important than it used to be," said John Pellerin, chief technology specialist at grid platform.The use of AI and the need for high throughput energy efficient interconnections are driving the growth of accelerators through advanced packaging technologies.We are excited to work with innovative partners like Arm to provide advanced packaging solutions that further integrate multiple node technologies on small chip sizes to optimize logic expansion, memory bandwidth, and rf performance.The collaboration will allow us to discover a new perspective on advanced packaging and enable our common customers to effectively create fully differentiated solutions."

Grid core has transformed its business model to help customers develop new solutions focused on the market and applications to meet the stringent needs of today's market.Grid's 3D face to face (F2F) packaging solution not only provides designers with heterogeneous logic and logic/memory integration approaches, but also optimizes the manufacturing of production nodes to achieve lower latency, higher bandwidth and smaller feature sizes.This strategy, as well as the early involvement of partners such as Arm, provides customers with more options and flexibility, while helping them reduce costs and drive the next generation of products to faster mass production.